File:PLL usage.svg

Original file(SVG file, nominally 521 × 114 pixels, file size: 20 KB)

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Summary

Description
English: Block diagram for the usage of a phase locked loop (PLL) system.
Date
Source Own work
Author Krishnavedala
SVG development
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LaTeX source code
\documentclass[12pt,border=1pt,crop,multi=false,tikz,class=scrartcl]{standalone}
\usepackage[T1]{fontenc}
\usepackage[utf8]{inputenc}
\usepackage{lmodern}
\usetikzlibrary{positioning,calc,shapes,fit}

\renewcommand*{\familydefault}{\sfdefault}

\begin{document}
    \begin{tikzpicture}[>=stealth,auto,thick]
        \node (n1) {\parbox{1.6cm}{Reference Clock}};
        \node [right=2cm of n1] (ref) {Ref};
        \node [below=1cm of ref.west,anchor=west] (feed) {Feedback};
        \node [anchor=west] at ($(n1)!.5!(feed)+(3cm,0)$) (pll) {\Large PLL};
        \node [isosceles triangle,isosceles triangle stretches=true,shape border rotate=180,right=1cm of pll,draw,inner sep=0pt,text centered,text width=5em] (clk) {Clock Distribution};
        \node at ($(clk.east)+(2,.5)$) [text width=6em,text centered] {Flip-Flops\\and\\Latches};
        \draw[->] (n1) -- (ref);
        \draw [->] (pll) -- (clk);
        \draw [->] ($(clk.east)+(0,-2em)$) -| ++(1,-1) -| ++(-9,0) |- (feed.west); 
        \draw [->] ($(clk.east)+(0,-1em)$) -- ++(1,0);
        \draw [->] (clk.east) -- ++(1,0);
        \draw [->] ($(clk.east)+(0,1em)$) -- ++(1,0);
        \draw [->] ($(clk.east)+(0,2em)$) -- ++(1,0);
        \node [draw, fit=(ref) (feed) (pll),inner sep=0pt] {};
    \end{tikzpicture}
\end{document}

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w:en:Creative Commons
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21 October 2014

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current04:16, 21 October 2014521 × 114 (20 KB)KrishnavedalaUser created page with UploadWizard

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